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| MC74AC74 MC74ACT74 Dual D Type Positive Edge Triggered Flip Flop The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH * Outputs Source/Sink 24 mA * ACT74 Has TTL Compatible Inputs VCC 14 CD2 13 D2 12 CP2 11 SD2 10 Q2 9 Q2 8 DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP N SUFFIX CASE 646-06 PLASTIC CD1 D1 Q1 CP1 S Q D1 1 SD2 CP2 Q2 D2 C Q D2 2 PIN NAMES D1, D2 CP1, CP2 CD1, CD2 SD1, SD2 Q1, Q1, Q2, Q2 Data Inputs Clock Pulse Inputs Direct Clear Inputs Direct Set Inputs Outputs D SUFFIX CASE 751A-03 PLASTIC 1 CD1 2 D1 3 CP1 4 SD1 5 Q1 6 Q1 7 GND LOGIC SYMBOL TRUTH TABLE (Each Half) Inputs SD L H L H H H CD H L L H H H CP X X X D X X X H L X Outputs Q H L H H L Q0 Q L H H L H Q0 Q1 SD1 D1 Q1 CD1 CP1 L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition Q0(Q0) = Previous Q(Q) before LOW-to-HIGH Transition of Clock Q2 SD2 D2 CP2 Q2 CD2 FACT DATA 5-1 MC74AC74 MC74ACT74 LOGIC DIAGRAM SD D Q CP Q CD Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. MAXIMUM RATINGS* Symbol VCC Vin Vout Iin Iout ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current -- High Output Current -- Low -40 25 VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 150 40 25 10 ns/V 8.0 140 85 -24 24 C C mA mA ns/V Typ 5.0 5.0 Max 6.0 5.5 VCC V Unit V 1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. FACT DATA 5-2 MC74AC74 MC74ACT74 DC CHARACTERISTICS 74AC Symbol Parameter VCC (V) TA = +25C Typ VIH Minimum High Level Input Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input Leakage Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 4.0 0.002 0.001 0.001 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 74AC TA = -40C to +85C Unit Conditions Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 75 -75 40 V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A V *VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 A V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND VIL Maximum Low Level Input Voltage V VOH Minimum High Level Output Voltage V V A mA mA A * All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3) 74AC Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPLH tPHL Maximum Clock Frequency Propagation Delay CDn or SDn to Qn or Qn Propagation Delay CDn or SDn to Qn or Qn Propagation Delay CPn to Qn or Qn Propagation Delay CPn to Qn or Qn 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 100 140 5.0 3.5 4.0 3.0 4.5 3.5 3.5 2.5 TA = +25C CL = 50 pF Typ 125 160 8.0 6.0 10.5 8.0 8.0 6.0 8.0 6.0 12.5 9.0 12.0 9.5 13.5 10.0 14.0 10.0 Max 74AC TA = -40C to +85C CL = 50 pF Min 95 125 4.0 3.0 3.5 2.5 4.0 3.0 3.5 2.5 13.0 10.0 13.5 10.5 16.0 10.5 14.5 10.5 Max MHz ns ns ns ns 3-3 3-6 3-6 3-6 3-6 Unit Fig. No. * Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V. FACT DATA 5-3 MC74AC74 MC74ACT74 AC OPERATING REQUIREMENTS 74AC Symbol Parameter VCC* (V) Typ ts th tw trec Set-up Time, HIGH or LOW Dn to CPn Hold Time, HIGH or LOW Dn to CPn CPn or CDn or SDn Pulse Width Recovery TIme CDn or SDn to CP 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 1.5 1.0 -2.0 -1.5 3.0 2.5 -2.5 -2.0 TA = +25C CL = 50 pF 74AC TA = -40C to +85C CL = 50 pF Unit Fig. No. Guaranteed Minimum 4.0 3.0 0.5 0.5 5.5 4.5 0 0 4.5 3.0 0.5 0.5 7.0 5.0 0 0 ns ns ns ns 3-9 3-9 3-6 3-9 * Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V. DC CHARACTERISTICS 74ACT Symbol Parameter VCC (V) TA = +25C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 4.5 5.5 IIN ICCT IOLD IOHD ICC Maximum Input Leakage Current Additional Max. ICC/Input Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 5.5 4.0 0.6 0.001 0.001 1.5 1.5 1.5 1.5 4.49 5.49 74ACT TA = -40C to +85C Unit Conditions Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0.1 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1.0 1.5 75 -75 40 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A *VIN = VIL or VIH -24 mA IOH -24 mA IOUT = 50 A *VIN = VIL or VIH 24 mA IOL 24 mA VI = VCC, GND VI = VCC - 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND V V V A mA mA mA A * All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. FACT DATA 5-4 MC74AC74 MC74ACT74 AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3) 74ACT Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPLH tPHL Maximum Clock Frequency Propagation Delay CDn or SDn to Qn or Qn Propagation Delay CDn or SDn to Qn or Qn Propagation Delay CPn to Qn or Qn Propagation Delay CPn to Qn or Qn 5.0 5.0 5.0 5.0 5.0 145 3.0 3.0 4.0 3.5 TA = +25C CL = 50 pF Typ 210 5.5 6.0 7.5 6.0 9.5 10.0 11.0 10.0 Max 74ACT TA = -40C to +85C CL = 50 pF Min 125 2.5 3.0 4.0 3.0 10.5 11.5 13.0 11.5 Max MHz ns ns ns ns 3-3 3-6 3-6 3-6 3-6 Unit Fig. No. * Voltage Range 5.0 V is 5.0 V 0.5 V. AC OPERATING REQUIREMENTS 74ACT Symbol Parameter VCC* (V) Typ ts th tw trec Set-up Time, HIGH or LOW Dn to CPn Hold Time, HIGH or LOW Dn to CPn CPn or CDn or SDn Pulse Width Recovery TIme CDn or SDn to CP 5.0 5.0 5.0 5.0 1.0 -0.5 3.0 -2.5 TA = +25C CL = 50 pF 74ACT TA = -40C to +85C CL = 50 pF Unit Fig. No. Guaranteed Minimum 3.0 1.0 5.0 0 3.5 1.0 6.0 0 ns ns ns ns 3-9 3-9 3-6 3-9 * Voltage Range 5.0 V is 5.0 V 0.5 V. CAPACITANCE Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 35 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V FACT DATA 5-5 MC74AC74 MC74ACT74 OUTLINE DIMENSIONS N SUFFIX PLASTIC DIP PACKAGE CASE 646-06 ISSUE L 14 8 B 1 7 NOTES: 1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01 A F C N H G D SEATING PLANE L J K M D SUFFIX PLASTIC SOIC PACKAGE CASE 751A-03 ISSUE F -A- 14 8 -B- 1 7 P 7 PL 0.25 (0.010) M B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. G C R X 45 _ F -T- SEATING PLANE D 14 PL 0.25 (0.010) M K TB S M A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com -TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 FACT DATA 5-6 *MC74AC74/D* MC74AC74/D |
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